Product Summary

The EPM3064ATI100-10N is a low–cost, high–performance Programmable Logic device which is based on the Altera MAX architecture. Fabricated with advanced CMOS technology, the EEPROM–based EPM3064ATI100-10N operates with a 3.3-V supply voltage and provide 600 to 10,000 usable gates, ISP, pin-to-pin delays as fast as 4.5 ns, and counter speeds of up to 227.3 MHz. The EPM3064ATI100-10N in the –4, –5, –6, –7, and –10 speed grades is compatible with the timing requirements of the PCI Special Interest Group (PCI SIG) PCI Local Bus Specification, Revision 2.2.

Parametrics

EPM3064ATI100-10N absolute maximum ratings: (1)Supply voltage With respect to ground: –0.5 to 4.6 V; (2)DC input voltage: –2.0 to 5.75 V; (3)DC output current, per pin: –25 to 25 mA; (4)Storage temperature: –65 to 150 ℃; (5)Ambient temperature: –65 to 135 ℃; (6)Junction temperature: 135 ℃ at PQFP and TQFP packages, under bias.

Features

EPM3064ATI100-10N features: (1)High.performance, low.cost CMOS EEPROM.based programmable logic devices (PLDs) built on a MAXR architecture; (2)3.3-V in-system programmability (ISP) through the built.in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface with; (3)advanced pin-locking capability: ISP circuitry compliant with IEEE Std. 1532; (4)Built.in boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1-1990; (5)Enhanced ISP features: Enhanced ISP algorithm for faster programming, ISP_Done bit to ensure complete programming, Pull-up resistor on I/O pins during in.system programming.

Diagrams

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